CPU feature detection for SDL. More...

Functions
int	SDL::GetNumLogicalCPUCores ()
	Get the number of logical CPU cores available.

int	SDL::GetCPUCacheLineSize ()
	Determine the L1 cache line size of the CPU.

bool	SDL::HasAltiVec ()
	Determine whether the CPU has AltiVec features.

bool	SDL::HasMMX ()
	Determine whether the CPU has MMX features.

bool	SDL::HasSSE ()
	Determine whether the CPU has SSE features.

bool	SDL::HasSSE2 ()
	Determine whether the CPU has SSE2 features.

bool	SDL::HasSSE3 ()
	Determine whether the CPU has SSE3 features.

bool	SDL::HasSSE41 ()
	Determine whether the CPU has SSE4.1 features.

bool	SDL::HasSSE42 ()
	Determine whether the CPU has SSE4.2 features.

bool	SDL::HasAVX ()
	Determine whether the CPU has AVX features.

bool	SDL::HasAVX2 ()
	Determine whether the CPU has AVX2 features.

bool	SDL::HasAVX512F ()
	Determine whether the CPU has AVX-512F (foundation) features.

bool	SDL::HasARMSIMD ()
	Determine whether the CPU has ARM SIMD (ARMv6) features.

bool	SDL::HasNEON ()
	Determine whether the CPU has NEON (ARM SIMD) features.

bool	SDL::HasLSX ()
	Determine whether the CPU has LSX (LOONGARCH SIMD) features.

bool	SDL::HasLASX ()
	Determine whether the CPU has LASX (LOONGARCH SIMD) features.

int	SDL::GetSystemRAM ()
	Get the amount of RAM configured in the system.

size_t	SDL::GetSIMDAlignment ()
	Report the alignment this system needs for SIMD allocations.

Variables
constexpr int	SDL::CACHELINE_SIZE = SDL_CACHELINE_SIZE
	A guess for the cacheline size used for padding.

Detailed Description

These functions are largely concerned with reporting if the system has access to various SIMD instruction sets, but also has other important info to share, such as system RAM size and number of logical CPU cores.

CPU instruction set checks, like HasSSE() and HasNEON(), are available on all platforms, even if they don't make sense (an ARM processor will never have SSE and an x86 processor will never have NEON, for example, but these functions still exist and will simply return false in these cases).

Function Documentation

◆ GetCPUCacheLineSize()

int SDL::GetCPUCacheLineSize ( )

inline

This is useful for determining multi-threaded structure padding or SIMD prefetch sizes.

Returns: the L1 cache line size of the CPU, in bytes.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ GetNumLogicalCPUCores()

int SDL::GetNumLogicalCPUCores ( )

inline

Returns: the total number of logical CPU cores. On CPUs that include technologies such as hyperthreading, the number of logical cores may be more than the number of physical cores.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ GetSIMDAlignment()

size_t SDL::GetSIMDAlignment ( )

inline

This will return the minimum number of bytes to which a pointer must be aligned to be compatible with SIMD instructions on the current machine. For example, if the machine supports SSE only, it will return 16, but if it supports AVX-512F, it'll return 64 (etc). This only reports values for instruction sets SDL knows about, so if your SDL build doesn't have HasAVX512F(), then it might return 16 for the SSE support it sees and not 64 for the AVX-512 instructions that exist but SDL doesn't know about. Plan accordingly.

Returns: the alignment in bytes needed for available, known SIMD instructions.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: aligned_alloc(); aligned_free()

◆ GetSystemRAM()

int SDL::GetSystemRAM ( )

inline

Returns: the amount of RAM configured in the system in MiB.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ HasAltiVec()

bool SDL::HasAltiVec ( )

inline

This always returns false on CPUs that aren't using PowerPC instruction sets.

Returns: true if the CPU has AltiVec features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ HasARMSIMD()

bool SDL::HasARMSIMD ( )

inline

This is different from ARM NEON, which is a different instruction set.

This always returns false on CPUs that aren't using ARM instruction sets.

Returns: true if the CPU has ARM SIMD features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasNEON()

◆ HasAVX()

bool SDL::HasAVX ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has AVX features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasAVX2(); HasAVX512F()

◆ HasAVX2()

bool SDL::HasAVX2 ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has AVX2 features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasAVX(); HasAVX512F()

◆ HasAVX512F()

bool SDL::HasAVX512F ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has AVX-512F features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasAVX(); HasAVX2()

◆ HasLASX()

bool SDL::HasLASX ( )

inline

This always returns false on CPUs that aren't using LOONGARCH instruction sets.

Returns: true if the CPU has LOONGARCH LASX features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ HasLSX()

bool SDL::HasLSX ( )

inline

This always returns false on CPUs that aren't using LOONGARCH instruction sets.

Returns: true if the CPU has LOONGARCH LSX features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ HasMMX()

bool SDL::HasMMX ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has MMX features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ HasNEON()

bool SDL::HasNEON ( )

inline

This always returns false on CPUs that aren't using ARM instruction sets.

Returns: true if the CPU has ARM NEON features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

◆ HasSSE()

bool SDL::HasSSE ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has SSE features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasSSE2(); HasSSE3(); HasSSE41(); HasSSE42()

◆ HasSSE2()

bool SDL::HasSSE2 ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has SSE2 features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasSSE(); HasSSE3(); HasSSE41(); HasSSE42()

◆ HasSSE3()

bool SDL::HasSSE3 ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has SSE3 features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasSSE(); HasSSE2(); HasSSE41(); HasSSE42()

◆ HasSSE41()

bool SDL::HasSSE41 ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has SSE4.1 features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasSSE(); HasSSE2(); HasSSE3(); HasSSE42()

◆ HasSSE42()

bool SDL::HasSSE42 ( )

inline

This always returns false on CPUs that aren't using Intel instruction sets.

Returns: true if the CPU has SSE4.2 features or false if not.

Thread safety:: It is safe to call this function from any thread.

Since: This function is available since SDL 3.2.0.

See also: HasSSE(); HasSSE2(); HasSSE3(); HasSSE41()

Variable Documentation

◆ CACHELINE_SIZE

constexpr int SDL::CACHELINE_SIZE = SDL_CACHELINE_SIZE

constexpr

Most x86 processors have a 64 byte cache line. The 64-bit PowerPC processors have a 128 byte cache line. We use the larger value to be generally safe.

Since: This constant is available since SDL 3.2.0.

Functions

Variables

Detailed Description

Function Documentation

◆ GetCPUCacheLineSize()

◆ GetNumLogicalCPUCores()

◆ GetSIMDAlignment()

◆ GetSystemRAM()

◆ HasAltiVec()

◆ HasARMSIMD()

◆ HasAVX()

◆ HasAVX2()

◆ HasAVX512F()

◆ HasLASX()

◆ HasLSX()

◆ HasMMX()

◆ HasNEON()

◆ HasSSE()

◆ HasSSE2()

◆ HasSSE3()

◆ HasSSE41()

◆ HasSSE42()

Variable Documentation

◆ CACHELINE_SIZE